Bridge --- close the gap

Prereqs: Fundamentals (at least through overdamped vs underdamped)
Next: Phase to Pulse

Why bridge pages exist

Fundamentals teach devices and flux. Concepts name cells and tools. Between them sits a cliff: "I know what ${\Phi }_0$ is, but I still don't see how a chip computes."

Bridge pages are longer on purpose. They tell stories, draw waveforms, and walk tiny examples until the jump feels walkable. If a concept card feels sudden --- come back here. Do not skip.

More wording is intentional so newcomers can follow with patience (same pedagogy spirit as PQC Learn).

Reading order

1. Phase to pulse --- $2\pi$ slip → picosecond voltage pulse (interactive lab)
2. Pulse to logic state --- windows, storage loops, clocked readout (interactive lab)
3. Gate-level pipelining --- every gate is also a timing stage (interactive lab)
4. Resistive bias to ERSFQ --- static power in bias resistors (interactive lab)
5. DC bias current delivery --- why chips need amperes (interactive lab)
6. SFQ pulse to voltage levels --- why I/O amplifiers exist (interactive lab)

After bridges

• Logic cells: start at RSFQ overview
• Coming from CMOS: CMOS vs SFQ
• Home: Curriculum index
• Glossary: plain-English terms